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RIA Resilience call reinforcing Europe's strength in 6G radio communication systems

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Expected Outcome:
The proposals under this topic should address the design/specification and implementation/testing of the key microelectronics building blocks of an FR3 FEM paving the way towards their future integration into a complete integrated FEM system.
• Progresses the State of the art to optimise the cost-performance trade off to serve the target ITU IMT 2030 specifications, notably for what concerns maximum data rate, user data rate, spectral efficiency, whilst enabling 50% mobile transmission system energy consumption;
• Allows operational implementation of spectrum sharing with other spectrum users within the selected FR3 sub-band; • Enables large arrays integration for increased path loss compensation at FR3 frequencies with very compact, low power, high efficiency FEM integration;
• Enables high bandwidth for carrier aggregation with broadband RF transceivers;
• Enables SBFD (Sub-Band non overlapping Full-Duplex) for UL coverage extension (Rel.-19 5G-Advanced in 3GPP) with appropriate interference cancellation techniques;
• Enables ISAC (Integrated Sensing and Communications) supporting monostatic as well as bistatic radar functionality, and addressing interference management, bandwidth, and potentially different waveforms (if appropriate) for communication and sensing functions;
• Builds up on core technologies and IP blocks in view of their further in package integration for the various functionalities to be implemented, including as a minimum i) computing ii) RF iii) power generation technologies: iv) beam forming technologies; • Is based on semiconductor technology development supporting at least characterised models for RF, standard cell support for compute, interconnect and memory, and supported with relevant PDK and EDA support (analog/digital). • Enables base die development for implementation of the most critical functions and subsystem integration and paves the way towards their future complete integration enabling validation in real environment (outside of this project)
• Enables FEM system integration with packaging; • Allows to progress European know-how in microelectronics domains where Europe is today less advanced, notably in the field of digital technologies, and with advances at least from the design perspective;
• Paves the way towards the emergence of an alternative European ecosystem of technology suppliers for FEM modules as needed by EU vendors; • Stimulates related progresses in the field of design tools, notably for Process Design Kits (PDKs). • Extent to which the project results contribute to reinforce a European ecosystem of microelectronic suppliers for the telecom industry.
• Stimulates related progresses in the field of design tools, notably for Process Design Kits (PDKs).
Collaboration with the relevant Pilot Lines is encouraged and a plan for further pre industrialisation of an integrated FEM SiP is part of the target outcomes.

Status
Open
Deadline
(time not stated)
Opens
Published
Total budget
€20,000,000
Grant range
€1,000,000 – €20,000,000
Country
European Union (EU-wide)
Programme
Horizon Europe (HORIZON)
Official page
Open at the source portal

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Source document
https://ec.europa.eu/info/funding-tenders/opportunities/data/topicDetails/horizon-ju-chips-2026-2-ria.json
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c69580a740f8c97e (SHA-256, first 16 hex characters)
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© European Union, 2026. Source: EU Funding & Tenders Portal. Reused under Commission Decision 2011/833/EU — CC BY 4.0.

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The source last updated this document on Mon, 06 Jul 2026 22:01:25 GMT.

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